DS15MB200 Datasheet Text
DS15MB200 Dual 1.5 Gbps 2:1/1:2 LVDS Mux/Buffer with Pre-Emphasis
May 2006
DS15MB200 Dual 1.5 Gbps 2:1/1:2 LVDS Mux/Buffer with Pre-Emphasis
General Description
The DS15MB200 is a dual-port 2 to 1 multiplexer and 1 to 2 repeater/buffer. High-speed data paths and flow-through pinout minimize internal device jitter and simplify board layout, while pre-emphasis overes ISI jitter effects from lossy backplanes and cables. The differential inputs and outputs interface to LVDS or Bus LVDS signals such as those on National’s 10-, 16-, and 18- bit Bus LVDS SerDes, or to CML or LVPECL signals. .. The 3.3V supply, CMOS process, and robust I/O ensure high performance at low power over the entire industrial -40 to +85˚C temperature range.
Features n 1.5 Gbps data rate per channel n Configurable off/on pre-emphasis drives lossy backplanes and cables n LVDS/BLVDS/CML/LVPECL patible inputs, LVDS patible outputs n Low output skew and jitter n On-chip 100Ω input and output termination n 15 kV ESD protection on LVDS inputs/outputs n Hot plug Protection n Single 3.3V supply n Industrial -40 to +85˚C temperature range n 48-pin LLP Package
Typical Application
20157310
Block Diagram
20157301
© 2006 National Semiconductor Corporation
DS201573
.national.
DS15MB200
Pin Descriptions
Pin Name SIA_0+ SIA_0- SIA_1+ SIA_1- SIB_0+ SIB_0- SIB_1+ SIB_1- LI_0+ LI_0- LLP Pin Number 30 29 19 20 28 27 21 22 40 39 9 10 34 33 15 16 32 31 17 18 42 41 7 8 38 11 26 23 25 24 44 5 36 13 35 14 45 4 I/O, Type Description
SWITCH SIDE DIFFERENTIAL INPUTS I, LVDS I, LVDS I, LVDS I, LVDS Switch A-side Channel 0 inverting and non-inverting differential inputs. LVDS, Bus LVDS, CML, or LVPECL patible. Switch A-side Channel 1 inverting and non-inverting differential inputs....